EDN

Circuit gates pulse train without truncating

To gate an integral clock pulse sequence from a continuous source without distorting pulse duration and number is not a trivial task. In most cases, a simple AND gate will cause problems, see Figure 1 ...
PC Magazine

clock pulse

A signal used to synchronize the operations of an electronic system. Clock pulses are continuous, precisely spaced changes in voltage. See clock speed. THIS DEFINITION IS FOR PERSONAL USE ONLY. All ...
PC Magazine

clock buffer

A circuit in a CPU or GPU that evenly distributes and strengthens the clock pulses to all logic gates. The clock transmits pulses to all the circuits and "gives life" to the machine. In a complex chip ...
Light Reading

Pulse Intros Clock Source

TORRANCE, Calif. -- Pulse Research Lab (PRL) introduces the unique PRL 174ANT-1350 NECL/TTL Programmable VCO Clock Source. This self-contained clock source pod is manually programmable and generates ...
EDN

Modified clock filters improve at-speed test

The push for higher performance at lower power and cost has driven the VLSI industry towards System-on-Chip (SoC) integration resulting in designs with multiple clocks. It is common to see blocks that ...